Fully Automated Wafer Cleaning Tool (IZM-130) - PR1097493-3460-P
Nur kurz prüfen. Der Bezug zu FTTH, Tiefbau oder Hausanschlüssen ist aktuell schwach erkannt.
Leistungen & Waren auf einen Blick
Fully Automated Wafer Cleaning Tool (IZM-130) - PR1097493-3460-P
- Kein geparstes LV vorhanden; Mengen kommen aus Bekanntmachung/Analyse.
- Keine konkreten Warenpositionen erkannt.
| Position | Menge | Quelle |
|---|---|---|
Fully Automated Wafer Cleaning Tool The following device specification defines a fully automated wet Leistung | 1 St | Text 1x Fully Automated Wafer Cleaning Tool The following device specification defines a fully automated wet tool for cleaning and optional etching of wafer substrates. The new device expands the process portfolio with variou |
| Position | Menge | Quelle |
|---|---|---|
Keine Warenposition im Text erkannt Waren | nicht beziffert | Text |
Steckbrief
Unterlagen: Login erforderlich- Was
- Unklar- Kategorie prüfen
- Auftraggeber
- Fraunhofer-Gesellschaft - Einkauf B12
- Ort
- Dresden, Bayern
- Wert / Lose
- 1 Los
- Frist
- —
- Verfahren
- Verhandlungsverfahren mit Teilnahmewettbewerb
- Bauzeit
- —
- Anschrift
- Hansastraße 27c, 80686, München·vergabe.fraunhofer.de
- Nachprüfung
- Vergabekammern des Bundes · Bonn·vk@bundeskartellamt.bund.de
Ausschreibungsunterlagen & LV
LV im Unterlagenportal prüfenLeistungen & Materialien
Keine spezifischen Leistungen erkannt — Quelldokumente prüfen
Kurzbeschreibung
- Fully Automated Wafer Cleaning Tool (IZM-130)
Lose (1)
Los LOT-0000: Fully Automated Wafer Cleaning Tool (IZM-130) - PR1097493-3460-P
1x Fully Automated Wafer Cleaning Tool The following device specification defines a fully automated wet tool for cleaning and optional etching of wafer substrates. The new device expands the process portfolio with various cleaning technologies for removing organic and inorganic contaminants for applications such as cleaning TSVs with high aspect ratios (up to 25:1), front and back decontamination for ultra-high-density BEOL such as wiring or for stacking technologies with Cu/Cu hybrid connections with sub-µm structure sizes. The requirements for decontamination and cleanliness of the wafer surface necessitate particle control to less than 1 μm in size, metallic surface contamination of less than 10^9 atoms/cm^2, and surface roughness of less than 5 Å. The device is compatible with 3D wafer stacks with high deformation/warpage. The wafer substrates are made of silicon and/or glass, have a diameter of 200 or 300 mm and a thickness of up to 2.5 mm. Before the process, the wafers are transported to the device in front opening unified pods (FOUPs), which are manually placed on the respective loading openings by the operator. The new device must be capable of performing the following steps fully automatically: • Unloading the designated wafers from the FOUP • Turning the wafers • Performing the wet processes • Unloading the wafers back into their original position in the FOUP The programming of recipes must be possible within a reasonable range of options and parameters, as required for research and development (R&D). A safety cabinet must be available for mixing and storing all necessary wet chemicals. Optional features: - Thinned wafer thickness range of 200 and 300 mm (Si or glass): 300 ... 600 µm (LV item 1.19) - Extreme warpage and bow range 1500 .. 2500 µm (LV item 1.23) - Option: Inorganic etching process for metal and oxide layers (LV item 2.22) - Megasonic or similar energy as an option (LV item 2.58) - Single wafer spray process (LV item 2.59) - Adjustable spray nozzles/arm for optimising etching uniformity (LV item 2.60) - Optical end point detection (LV item 2.61) - Fast spin wafer chuck (adjustable) up to 2000 rpm (LV item 2.62) - Chemicals: two-component mixture and CO2-charged DI water (LV item 2.63) - 10-litre internal tanks with single/recovery mode (LV item 2.64) - Overflow protection (LV item 2.65) - Safety cabinet for storage, mixing and refilling of the two components (LV item 2.66) - Pure DI water (LV item 2.67) - Dry process (LV item 2.68) - 10 x 300 mm wafer silicon oxide etching without residues (etching rate > 0.1 µm/min for silicon dioxide, etching uniformity < 5 % 1 sigma) (LV item 3.25)
Vergaben (3)
Vergeben am: 11.05.2026
BKS award notice f2568516-360b-4ef0-be5e-03c350ccc4bb
Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
Vergeben am: 11.05.2026
BKS award notice f2568516-360b-4ef0-be5e-03c350ccc4bb
Datenqualität
2 offen- Fristfehlt
- Lose1 erkannt
- UnterlagenLogin erforderlich
- LVLV im Unterlagenportal prüfen
- OrtDresden, Bayern
- DetaildateneForms geladen
Beschreibung fehlt oder ist sehr kurz
Abgabefrist fehlt
Conviction
wahrscheinlich irrelevant- CPV-Code Telekommunikation/Energie+15
Lead-Status
Bearbeitungsstand der Ausschreibung.
Wird automatisch gespeichert.
Metadaten
- Quelle
- bekanntmachungsservice_opendata
- Externe ID
- f2568516-360b-4ef0-be5e-03c350ccc4bb
- Veröffentlicht
- 11.05.2026